Integrated circuit with reduced analog coupling noise

Details Integrated circuit with reduced analog coupling noise Integrated circuit with reduced analog coupling noise

2007-05-01

2007-05-01

Nguyen, Cuong (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

Having specific type of active device

C257S203000

Reexamination Certificate

active

11380443

ABSTRACT:
An integrated circuit includes CMOS circuit blocks and analog control lines arranged outside a layout of the CMOS circuit blocks so that the analog wiring and circuit blocks do not overlap each other. The distance of signal lines within a circuit block and the analog control lines can become as long as necessary, and the signal line within the circuit block and the analog control lines are not coupled via parasitic capacitance, and mutual interference is suppressed. In another aspect, a method of arranging a semiconductor integrated circuit includes providing a plurality of functional circuit blocks and connecting analog control wiring to the functional circuit blocks. The analog control wiring is arranged outside a layout of the functional circuit blocks on the semiconductor integrated circuit so that the analog control wiring does not overlap any one of the functional circuit blocks so as to reduce or eliminate interference between signal lines within a circuit block and the analog control lines.

REFERENCES:
patent: 04-080946 (1992-03-01), None
patent: 04-296918 (1992-10-01), None
patent: 05-047943 (1993-02-01), None
patent: 09-160684 (1997-06-01), None
patent: 2000-101021 (2000-04-01), None
patent: 2001-069128 (2001-03-01), None

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