Pad current splitting
Pad layout and lead layout in semiconductor device
Pad layout and lead layout in semiconductor device having a...
Pattern for routing power and ground for an integrated...
Per-bit set-up and hold time adjustment for double-data rate...
Peripheral circuits of electrically programmable...
Personalizable gate array devices
Personalizable semiconductor chips for analog and analog/digital
Photolithographic alignment marks based on circuit pattern featu
PLDs with high drive capability
PMD liner nitride films and fabrication methods for improved...
Polydirectional non-orthoginal three layer interconnect architec
Polysilicon linewidth measurement structure with embedded...
Power and ground routing of integrated circuit devices with...
Power and ground routing of integrated circuit devices with...
Power and ground shield mesh to remove both capacitive and...
Power and ground shield mesh to remove both capacitive and...
Power and signal routing technique for gate array design
Power distribution system for semiconductor die
Power distribution system, method, and layout for an...