Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
Patent
1994-04-21
1995-02-28
Jackson, Jerome
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
With particular signal path connections
257207, 257390, H01L 2702, H01L 2710, H01L 2715
Patent
active
053939964
ABSTRACT:
An integrated semiconductor configuration includes a semiconductor substrate of a first conductivity type being connected to a first supply potential, having a first region in which switching stages with signal terminals are disposed, and having at least a second region in which at least one connecting line is disposed for connecting the signal terminals of the switching stages. A multiplicity of doping zones are disposed in the second region and have a second conductivity type complementary to the first conductivity type. The doping zones are connected to a second supply potential, the doping zones have a total surface area, and at least a portion of the total surface area is located under the at least one connecting line. The first and second regions are strip-shaped. The first and second regions have long sides bordering one another. The second region has a width and each of the doping zones of the second region extend over the width of the second region. The semiconductor substrate has a segment of the first conductivity type being located between each two of the doping zones.
REFERENCES:
patent: 5136357 (1992-08-01), Hesson et al.
IBM Technical Disclosure Bulletin 30 (1988) May, No. 12, p. 4, "CMOS Gate with Low Inductance of . . . ".
Greenberg Lauence A.
Jackson Jerome
Lerner Herbert L.
Monin, Jr. Donald L.
Siemens Aktiengesellschaft
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