Tapered floating gate with nitride spacers to prevent...
Tapered threshold reset FET for CMOS imagers
Technique for fabricating logic elements using multiple gate...
Technique for improving negative potential immunity of an...
Technique for stable processing of thin/fragile substrates
Technique for stable processing of thin/fragile substrates
Technique to control tunneling currents in DRAM capacitors,...
Technique to control tunneling currents in DRAM capacitors,...
Technique to mitigate short channel effects with vertical...
Technique to obtain high mobility channels in MOS...
Technique to obtain increased channel mobilities in NMOS...
Technique to produce isolated junctions by forming an...
Technique to quench electrical defects in aluminum oxide film
Techniques for coupling in semiconductor devices and...
Techniques for improving negative bias temperature...
Techniques for improving transistor-to-transistor stress...
Techniques for spin-flop switching with offset field
Techniques to reduce substrate cross talk on mixed signal...
Techniques to reduce substrate cross talk on mixed signal...
Technology for high performance buried contact and tungsten...