Techniques for spin-flop switching with offset field

Details Techniques for spin-flop switching with offset field Techniques for spin-flop switching with offset field

2007-09-25

2007-09-25

Pham, Long (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S421000

Reexamination Certificate

active

10831839

ABSTRACT:
Techniques for reducing switching fields in semiconductor devices are provided. In one aspect, a semiconductor device comprising at least a first magnetic layer and a second magnetic layer with a spacer layer therebetween is provided. The semiconductor device is configured such that a thickness of at least one of the first magnetic layer and the second magnetic layer maintains a desired activation energy of the semiconductor device in the presence of an applied offsetting magnetic field. A method of reducing a switching field of a semiconductor device having at least a first magnetic layer and a second magnetic layer with a spacer layer therebetween is also provided.

REFERENCES:
patent: 6545906 (2003-04-01), Savtchenko et al.
patent: 6633498 (2003-10-01), Engel et al.
Parkin, S.S.P., “Giant Magnetoresistance and Oscillatory Interlayer Coupling in Polycrystalline Transition Metal Multilayers,” Ultrathin Magnetic Structures II, pp. 148-194 (May 12, 1995).

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