&agr;-tantalum lead for use with magnetic tunneling junctions
&agr;-WO3-gate ISFET devices and method of making the same
1T1R resistive memory
2-bit mask ROM device and fabrication method thereof
2Bit/cell architecture for floating gate flash memory...
2F-square memory cell for gigabit memory applications
2F2 memory device system
3-D channel field-effect transistor, memory cell and...
3-D CMOS transistors with high ESD reliability
3-D CMOS-on-SOI ESD structure and method
3-D single gate inverter
3D backside illuminated image sensor with multiplexed pixel...
3D channel architecture for semiconductor devices
3D polysilicon ROM and method of fabrication thereof
4 F2 folded bit line dram cell structure having buried bit...
4F 2 EEPROM NROM memory arrays with vertical devices
4F 2 EEPROM NROM memory arrays with vertical devices
4F-square memory cell having vertical floating-gate transistors
6¼ f2 DRAM cell structure with four nodes per...
6F2 Trench EDRAM cell with double-gated vertical MOSFET and...