Automated well-tie and substrate contact insertion methodology

Avalanche injection EEPROM memory cell with P-type control gate

Avalanche programmed floating gate memory cell structure...

Avalanche-enhanced CMOS transistor for EPROM/EEPROM and ESD-prot

Avoiding shorting in capacitors

Back gate FinFET SRAM

Back-biased MOS device and method

Back-biasing in asymmetric MOS devices

Back-end capacitor with high unit capacitance

Back-plane for semiconductor device

Back-source MOSFET

Back-to-back NPN/PNP protection diodes

Back-to-back NPN/PNP protection diodes

Backgated FinFET having different oxide thicknesses

Backmetal drain terminal with low stress and thermal resistance

Backside buried strap for SOI DRAM trench capacitor

Backside contacts for MOS devices

Backside contacts for MOS devices

Backside illuminated image sensor

Backside illuminated imaging sensor with backside P + doped...