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Adhesion by plasma conditioning of semiconductor chip

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate

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Adhesion by plasma conditioning of semiconductor chip

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate

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Adhesion by plasma conditioning of semiconductor chip surfaces

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
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Anisotropic conductive sheet and printed circuit board

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Patent

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Apparatus and method for forming solder seals for...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
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Apparatus for mounting a flip-chip semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Patent

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Apparatus for packaging flip chip bare die on printed circuit bo

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Patent

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Apparatus for sealing a semiconductor device utilizing a...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate

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Apparatus to reduce thermal fatigue stress on flip chip...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
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Area array type semiconductor package and fabrication method

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
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Area matched package

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Patent

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Arrangement for accessing region of a flip chip die

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate

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Array structure of solder balls able to control collapse

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate

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Attachment of surface mount devices to printed circuit...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate

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Backplane grounding for flip-chip integrated circuit

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Patent

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Balanced coefficient of thermal expansion for flip chip ball...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate

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Ball grid array IC package and manufacturing method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate

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Ball grid array integrated circuit package structure

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
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Ball grid array package having through-holes disposed in the sub

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Patent

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BGA package with same power ballout assignment for wire...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate

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