Backplane grounding for flip-chip integrated circuit

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip

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Details

257691, 257697, 257659, 361748, 361772, H01L 2328

Patent

active

053110595

ABSTRACT:
A semiconductor device package comprises a substrate (20) having a metallization pattern (22) on at least one surface, and a semiconductor device (10) having an active surface (12) and a grounded surface (14) on opposed sides. The semiconductor device is electrically attached to the substrate metallization pattern with the active surface (12) facing the substrate. A polymeric underfill material (30) substantially fills the space between the semiconductor device and the substrate. An electrically conductive material (35) covers the exposed grounded surface (14) of the semiconductor device and at least a portion of the metallization pattern (22), providing electrical connection between the grounded surface of the semiconductor and the metallization pattern (22) on the substrate.

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patent: 3614546 (1971-10-01), Avins
patent: 3811183 (1974-05-01), Celling
patent: 4801999 (1989-01-01), Hayward et al.
patent: 4820013 (1989-04-01), Fuse
patent: 4843036 (1989-06-01), Schmidt et al.
patent: 4996629 (1991-02-01), Christiansen et al.
patent: 4999699 (1991-03-01), Christie et al.
patent: 5121190 (1992-06-01), Hsiao et al.

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