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Merged Memory and Logic (MML) integrated circuits and methods in

Static information storage and retrieval – Read/write circuit – Testing
Patent

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Merged Memory and Logic (MML) integrated circuits including data

Static information storage and retrieval – Read/write circuit – Multiplexing
Patent

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Merged memory and logic (MML) integrated circuits including inde

Static information storage and retrieval – Read/write circuit – Multiplexing
Patent

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Merged memory logic integrated circuits including buffers driven

Static information storage and retrieval – Read/write circuit – Signals
Patent

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Merged memory-logic semiconductor device having a built-in...

Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate

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Merged MOS-bipolar capacitor memory cell

Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Reexamination Certificate

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Merging write cycles by comparing at least a portion of the...

Static information storage and retrieval – Read/write circuit
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Message FIFO buffer controller

Static information storage and retrieval – Read/write circuit – Including signal comparison
Patent

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Metal programmable self-timed memories

Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate

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Metal programmable self-timed memories

Static information storage and retrieval – Read/write circuit – Differential sensing
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Method and a circuit architecture for testing an integrated...

Static information storage and retrieval – Read/write circuit – Testing
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Method and apparatus capable of programmably delaying clock...

Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate

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Method and apparatus for 1 of 4 register file design

Static information storage and retrieval – Read/write circuit – Multiplexing
Patent

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Method and apparatus for 1-T SRAM compatible memory

Static information storage and retrieval – Read/write circuit – Data refresh
Patent

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Method and apparatus for a dummy SRAM cell

Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate

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Method and apparatus for a level shifter for use in a semiconduc

Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Patent

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Method and apparatus for a low power self-timed memory control s

Static information storage and retrieval – Read/write circuit – Differential sensing
Patent

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Method and apparatus for a multiplexed address line driver

Static information storage and retrieval – Read/write circuit – Multiplexing
Reexamination Certificate

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Method and apparatus for a sense amplifier

Static information storage and retrieval – Read/write circuit – Differential sensing
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Method and apparatus for a serial access memory

Static information storage and retrieval – Read/write circuit – Serial read/write
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