Method and apparatus for a level shifter for use in a semiconduc

Details Method and apparatus for a level shifter for use in a semiconduc Method and apparatus for a level shifter for use in a semiconduc

1999-06-30

2000-12-26

Nelms, David

Static information storage and retrieval

Read/write circuit

Including level shift or pull-up circuit

365233, 365207, G11C 700

Patent

active

061669695

ABSTRACT:
Disclosed is a level shifter that can receive and convert a first signal that can have various voltage logic levels to a second signal having internal voltage logic levels. The level shifter includes first and second ascending/descending circuits, where the first ascend/descending circuit receives the first signal and the second ascend/descending circuit receives an inverted first signal. Each ascend/descending circuit is operable to descend a high logic level of the received signal to a low output voltage level and ascend a low logic level of the received signal to a high output voltage level. The output voltages from the first and second ascending/descending circuits are input to a sense amplifier that amplifies the difference between the output voltages in order to generate the internal voltage logic levels of the second signal. The first and second ascending/descending circuits buffer their respective received signals using the high logic level of the input signal as a supply voltage. The same principles are also applicable to the level shifting from internal voltage logic levels to external voltage logic levels.

REFERENCES:
patent: 4618785 (1986-10-01), van Tran
patent: 5113097 (1992-05-01), Lee
patent: 5467313 (1995-11-01), Jung et al.
patent: 5528173 (1996-06-01), Merritt et al.
patent: 5739726 (1998-04-01), Ling
patent: 5896045 (1999-04-01), Siegel et al.
patent: 5936428 (1999-08-01), Merritt et al.
patent: 5959902 (1999-09-01), Fontana et al.

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