Semiconductor memory device having two layers of bit lines arran

Semiconductor memory device having variable pitch array

Semiconductor memory device having wiring for selection of redun

Semiconductor memory device having word line driver

Semiconductor memory device having wordline enable signal...

Semiconductor memory device including memory cells connected to

Semiconductor memory device including memory cells connected to

Semiconductor memory device including memory cells connected to

Semiconductor memory device including plurality of global...

Semiconductor memory device including plurality of global...

Semiconductor memory device layout including increased...

Semiconductor memory device of open bit line type

Semiconductor memory device preventing erroneous writing in...

Semiconductor memory device provided with a write column...

Semiconductor memory device that can access two regions...

Semiconductor memory device using open data line arrangement

Semiconductor memory device using open data line arrangement

Semiconductor memory device using tapered arrangement of...

Semiconductor memory device with a countermeasure to a...

Semiconductor memory device with a hierarchical word line...