Multi level inhibit scheme

Multi level sensing of NAND memory cells by external bias curren

Multi state sensing of NAND memory cells by applying reverse-bia

Multi state sensing of NAND memory cells by varying source bias

Multi-bit data memory system and read operation

Multi-bit electromechanical memory devices and methods of...

Multi-bit flash memory cell and programming method using the...

Multi-bit flash memory device and memory cell array

Multi-bit flash memory device and memory cell array

Multi-bit flash memory device and program and read methods...

Multi-bit flash memory device having improved program rate

Multi-bit flash memory devices and methods of programming...

Multi-bit flash memory devices having a single latch...

Multi-bit memory cell array of a non-volatile semiconductor memo

Multi-bit memory cell array of a non-volatile semiconductor memo

Multi-bit memory cell having electrically floating body...

Multi-bit nonvolatile memory device and related programming...

Multi-bit virtual-ground NAND memory device

Multi-bit-cell non-volatile memory with maximized data capacity

Multi-bit-per-cell flash EEPROM memory with refresh