Multi state sensing of NAND memory cells by applying reverse-bia

Details Multi state sensing of NAND memory cells by applying reverse-bia Multi state sensing of NAND memory cells by applying reverse-bia

1999-08-06

2000-12-26

Hoang, Huan

Static information storage and retrieval

Floating gate

Multiple values

36518521, 36518517, 36518518, G11C 1604

Patent

active

061669512

ABSTRACT:
A method and circuit for sensing multi states of a NAND memory cell by applying reverse bias voltage at a constant gate voltage, preferably zero volts, generating a memory cell current in response to the applied reverse P well bias, and sensing the memory cell state.

REFERENCES:
patent: 5521865 (1996-05-01), Ohuchi et al.
patent: 5751634 (1998-05-01), Itoh et al.
patent: 5877980 (1999-03-01), Mang et al.
patent: 5946231 (1999-08-01), Endoh et al.
patent: 5953255 (1999-09-01), Lee
patent: 6005804 (1999-12-01), Hollmer et al.

Affiliated with

Also associated with

Rating

Multi state sensing of NAND memory cells by applying reverse-bia does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multi state sensing of NAND memory cells by applying reverse-bia, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi state sensing of NAND memory cells by applying reverse-bia will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1002234