Multi-bit flash memory device having improved program rate

Details Multi-bit flash memory device having improved program rate Multi-bit flash memory device having improved program rate

2005-09-20

2008-10-07

Le, Vu A (Department: 2824)

Static information storage and retrieval

Floating gate

Particular connection

C365S185080

Reexamination Certificate

active

07433228

ABSTRACT:
A method is provided for programming a nonvolatile memory array including an array of memory cells, where each memory cell including a substrate, a control gate, a charge storage element having at least two charge storage areas for storing at least two independent charges, a source region and a drain region. The method includes designating at least one memory cell as a high-speed memory cell and pre-conditioning the high-speed memory cells by placing a first of the at least two charge storage areas into a programmed state, and subsequently enabling the programming on the second area with much higher rate.

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