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Selected: C

Compiled variable internal self time memory

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate

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Complementary metal oxide semiconductors address drive circuit

Static information storage and retrieval – Addressing
Patent

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Complementary metal-insulated semiconductor memory decoder

Static information storage and retrieval – Addressing
Patent

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Complementary semiconductor memory device including cell access

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent

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Composite memory device

Static information storage and retrieval – Addressing – Optical
Reexamination Certificate

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Computer memory system with integrated parallel shift circuits

Static information storage and retrieval – Addressing
Patent

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Computer storage arrangements with overwrite warning

Static information storage and retrieval – Addressing
Patent

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Configurable addressing for multiple chips in a package

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate

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Configurable DDR write-channel phase advance and delay...

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Configurable latching for asynchronous memories

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Configurable memory block

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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Configurable memory block

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Configurable random-access-memory circuitry

Static information storage and retrieval – Addressing – Multiple port access
Reexamination Certificate

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Configurable SRAM and method for providing the same

Static information storage and retrieval – Addressing – Multiplexing
Patent

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Configurable SRAM for field programmable gate array

Static information storage and retrieval – Addressing – Multiple port access
Patent

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Configuration and method for checking an address generator

Static information storage and retrieval – Addressing
Reexamination Certificate

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Configuration for data transmission in a semiconductor...

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Configuration of memory device

Static information storage and retrieval – Addressing – Including particular address buffer or latch circuit...
Reexamination Certificate

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Configuration of memory device

Static information storage and retrieval – Addressing – Including particular address buffer or latch circuit...
Reexamination Certificate

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Connection/disconnection control circuit for data lines between

Static information storage and retrieval – Addressing – Plural blocks or banks
Patent

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