Static information storage and retrieval – Addressing – Multiplexing
Patent
1994-06-06
1995-04-11
Fears, Terrell W.
Static information storage and retrieval
Addressing
Multiplexing
36518902, 36523003, G11C 1300, H03K 19177
Patent
active
054065259
ABSTRACT:
A configurable SRAM (21) is provided that is full diffused for increased speed and density and configurable for different word widths. Configuration signals are applied to control logic (28) for selecting a word width. The word width is smaller than or equal to a bit string of configurable SRAM (21). In a write operation, data input registers store and couple a word to a second bus. A shifter (27) receives the word from the second bus and shifts the bit locations of the word. A multiplexer (26) couples the shifted word to a first bus where write circuitry of read/write circuitry (24) writes the word to a selected bit string of a memory array (22) without affecting other bits of the selected bit string.
In a read operation, a selected bit string is provided from the memory array (22) to read circuitry. The read circuitry provides the selected bit string to the first bus. The multiplexer (26) couples a word from the selected bit string to the shifter (27). The shifter (27) shifts the bits of the word adjacent to one another on the second bus. Output drivers of the data input registers and output drivers (29) provide the word to other circuitry.
REFERENCES:
patent: 5315178 (1994-05-01), Snidor
Fears Terrell W.
Hoshizaki Gary W.
Motorola Inc.
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