Dual-port SRAM in a programmable logic device
Dual-port static random access memory cell
Dual-port static random access memory having improved cell...
Dual-ported read SRAM cell with improved soft error immunity
Enhanced register array accessible by both a system microprocess
Equilibrated sam read transfer circuit
Expandable data width SAM for a multiport RAM
Expandable data width sam for a multiport ram
Fast read port for register file
Fast read port for register file
Fixed phase clock and strobe signals in daisy chained chips
Flash memory array structure suitable for multiple...
Flash memory array structure suitable for multiple...
Flash memory array structure suitable for multiple...
Folded-bitline dual-port DRAM architecture system
Forced pulldown of array read bitlines for generating MUX...
Four port RAM cell
Global wire management apparatus and method for a multiple-port
High density two port SRAM cell for low voltage CMOS application
High performance gain cell architecture