Equilibrated sam read transfer circuit

Details Equilibrated sam read transfer circuit Equilibrated sam read transfer circuit

1997-01-21

1997-08-05

Yoo, Do Hyun

Static information storage and retrieval

Addressing

Multiple port access

365190, 365202, 365207, G11C 700

Patent

active

056549334

ABSTRACT:
A circuit and method are described for transferring data from a dynamic random access memory (DRAM) to a serial access memory (SAM). The SAM includes an equilibration circuit and a bias circuit for equilibrating the SAM to a predetermined potential prior to transferring data. Data is transferred to the SAM by creating a differential voltage on the SAM and using the differential to latch the state of the data in the SAM.

REFERENCES:
patent: 4891794 (1990-01-01), Hush et al.
patent: 5235545 (1993-08-01), McLaury
patent: 5265050 (1993-11-01), McLaury
patent: 5282177 (1994-01-01), McLaury
patent: 5311478 (1994-05-01), Zagar et al.
patent: 5323350 (1994-06-01), McLaury
patent: 5325502 (1994-06-01), McLaury
patent: 5369622 (1994-11-01), McLaury
patent: 5394172 (1995-02-01), McLaury
patent: 5402378 (1995-03-01), Min et al.
patent: 5418748 (1995-05-01), Monden
patent: 5487043 (1996-01-01), Furutani et al.
patent: 5506811 (1996-04-01), McLaury
"VRAM--256l.times.8 DRAM with 512.times.8 SAM;" Specialty DRAM -Graphics/Communications 1993 Data Book; Micron Semiconductor, Inc.; pp. 2-139 -2-180 (1993).

Affiliated with

Also associated with

Rating

Equilibrated sam read transfer circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Equilibrated sam read transfer circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Equilibrated sam read transfer circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1079801