Static information storage and retrieval – Addressing – Multiple port access
Patent
1995-05-12
1998-01-20
Nelms, David C.
Static information storage and retrieval
Addressing
Multiple port access
36518905, 365154, G11C 1100
Patent
active
057107424
ABSTRACT:
A two-port memory cell design which permits simultaneous reading and writing of cells which are on the same wordline but on different Bit Select lines without increase in Read Access Time, and while maintaining memory functionality at low voltages. The memory cell uses a standard 6 transistor design to provide a differential read for fast access plus another three transistors are added to each cell to provide a means of differentially writing the cell and de-gating the write if the bit-select is not active. This cell design has applicability to multi-port memories as well.
REFERENCES:
patent: 4719596 (1988-01-01), Bernstein et al.
patent: 4764899 (1988-08-01), Lewallen et al.
patent: 5034924 (1991-07-01), Taniguchi et al.
patent: 5068852 (1991-11-01), Mahant-Shetti et al.
patent: 5260908 (1993-11-01), Ueno
patent: 5282174 (1994-01-01), Little
patent: 5287323 (1994-02-01), Takahashi et al.
patent: 5289432 (1994-02-01), Dhong et al.
patent: 5299158 (1994-03-01), Mason et al.
patent: 5307322 (1994-04-01), Usami et al.
patent: 5317536 (1994-05-01), Aoyama
patent: 5327372 (1994-07-01), Oka et al.
patent: 5335199 (1994-08-01), Aoyama
patent: 5396449 (1995-03-01), Atallah et al.
patent: 5469380 (1995-11-01), Iio
Carter Eric Lee
Gregor Roger Paul
Lee Moon Ho
Ouellette Michael Richard
International Business Machines - Corporation
Le Vu A.
Nelms David C.
Shkurko Eugene I.
LandOfFree
High density two port SRAM cell for low voltage CMOS application does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with High density two port SRAM cell for low voltage CMOS application, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High density two port SRAM cell for low voltage CMOS application will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-730583