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Low resistance metal interconnect lines and a process for...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
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Low resistance metal silicide local interconnects and a...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
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Low resistance metal silicide local interconnects and a...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
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Low Resistance package for semiconductor devices

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
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Low resistance peripheral contacts while maintaining DRAM...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Low resistance peripheral local interconnect contacts with...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Low resistance poly landing pad

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent

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Low resistance salicide technology with reduced silicon...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Low resistance self aligned extended gate structure...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
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Low resistance semiconductor process and structures

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
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Low resistance strap for high density trench DRAMS

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Low resistance T-gate MOSFET device using a damascene gate...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
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Low resistance T-shaped ridge structure

Semiconductor device manufacturing: process – Chemical etching – Liquid phase etching
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Low resistance T-shaped ridge structure

Semiconductor device manufacturing: process – Chemical etching – Liquid phase etching
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Low resistance thin film organic solar cell electrodes

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal
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Low resistance thin film organic solar cell electrodes

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal
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Low resistance, self-aligned, titanium silicide structures, usin

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Low resistivity copper conductor line, liquid crystal...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Low resistivity deep trench fill for DRAM and EDRAM...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
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Low resistivity poly-silicon gate produced by selective...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
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