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Source side injection storage device with control gates...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Source side injection storage device with control gates...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Source side injection storage device with spacer gates and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Source side injection storage device with spacer gates and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Source-side stacking fault body-tie for partially-depleted...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Source/drain doping technique for ultra-thin-body SOI MOS...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Source/drain extension fabrication process with direct...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Source/drain extension implant process for use with short...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Source/drain extensions having highly activated and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Source/drain stressor and method therefor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Source/drain stressors formed using in-situ epitaxial growth

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer assisted trench top isolation for vertical DRAM's

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer for a split gate flash memory cell and a memory cell...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer formation by poly stack dopant profile design

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer formation for graded dopant profile having a triangular g

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer formation in a deep trench memory cell

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer formation process using oxide shield

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer like floating gate formation

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer patterned augmentation of tri-gate transistor gate...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Spacer patterned, high dielectric constant capacitor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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