&Sgr;&Dgr;delta modulator controlled phase locked loop with...
10/100 mb clock recovery architecture for switches,...
Accounting for clock slew in serial communications
Adapter for the connection to a clear-channel telecommunication
Adaptive control of clock spread to mitigate radio frequency...
Adaptive data separator
Adaptive de-skew clock generation
Adaptive phase locked loop
Adaptive sampling rate converter
Adaptive sampling rate converter
Address generator, interleave unit, deinterleave unit, and...
Adjustment circuit and method for tuning of a clock signal
Alignment mode selection mechanism for elastic interface
All digital on-the-fly time delay calibrator
All digital phase-locked loop with widely locked frequency
All-digital phase modulator/demodulator using multi-phase...
All-digital symbol clock recovery loop for synchronous...
Analog PLL clock recovery circuit and a LAN transceiver employin
Analog unidirectional serial link architecture
Analog unidirectional serial link architecture