Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2007-05-22
2007-05-22
Burd, Kevin (Department: 2611)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C327S147000
Reexamination Certificate
active
10249335
ABSTRACT:
Multi-phase clocks are used to encode and decode signals that are phase-modulated. The input signal is phase-compared with a feedback clock. Phase differences increment or decrement an up/down counter. The count value from the up/down counter is applied to a phase rotator, which selects one clock phase from a bank of multi-phase clocks. The multi-phase clocks have the same frequency, but are offset in phase from each other. An output divider divides the selected multi-phase clock to generate a phase-modulated output. A feedback divider divides a fixed-phase clock from the multi-phase clocks to generate the feedback clock. An analog or a digital front-end may be used to convert analog inputs to digital signals to increment or decrement the counter, or to encode multiple digital bits as phase assignments. For a de-modulator, a digital-to-analog converter (DAC) or a digital decoder produces the final output from the count of the up/down counter.
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Auvinen Stuart T.
Burd Kevin
g Patent LLC
Kingston Technology Corp.
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