Adaptive data separator

Details Adaptive data separator Adaptive data separator

1993-03-16

1995-05-02

Chin, Stephen

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

375371, 327 98, 327141, H03L 700

Patent

active

054126983

ABSTRACT:
An adaptive data separator for detecting systematic differences between the arrivals of the rising and falling edges of a digital signal and for compensating for the difference. Data packets from a transmission source are prefixed with two data bits of known values. The data separator is also supplied with four clock signals per bit, one corresponding to an ideal rising edge and three following every 5 nanoseconds. The two prefix bits preceding a data packet are then sampled at each of the clock signals. Since all information in a given data packet undergoes the same systematic distortion, the logic of the adaptive data separator can determine the optimum clock signal to use in sampling each bit of data for the packet. Through several multiplexers the incoming data is then clocked to the optimal clock signal for sampling.

REFERENCES:
patent: 4386323 (1983-05-01), Jansen
patent: 4756011 (1988-07-01), Cordell
patent: 4805197 (1989-02-01), Van Der Jagt et al.
patent: 4841551 (1989-06-01), Avaneas
patent: 5022057 (1991-06-01), Nishi et al.

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