Latch circuit for latching data at an edge of a clock signal
Latch circuit for receiving small amplitude signals
Latch circuit having a logical operation function
Latch circuit having reduced input/output load memory and...
Latch circuit including a data retention latch
Latch circuit tolerant to single event transient
Latch circuit with metastability trap and method therefor
Latch circuit with metastability trap and method therefor
Latch control circuit
Latch control circuit for crossing clock domains
Latch inverter and flip-flop using the same
Latch operating with a low swing clock signal
Latch or phase detector device
Latch ratio circuit with plural channels
Latch structures and systems with enhanced speed and reduced...
Latch with clocked devices
Latch with data jitter free clock load
Latching circuit capable of rapid operation with low electric po
Latching mechanism for pulsed domino logic with inherent race ma
Latching method