Latch circuit tolerant to single event transient

Details Latch circuit tolerant to single event transient Latch circuit tolerant to single event transient

2011-07-19

2011-07-19

Nguyen, Long (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

C327S208000, C327S210000, C327S212000, C327S218000

Reexamination Certificate

active

07982515

ABSTRACT:
A latch circuit has: a data input unit to which an input data is input; and a data retention unit including a node connected to the data input unit. The data input unit transmits a data depending on the input data to the node, when both of a first clock signal and a second clock signal that are driven independently from each other are at a first level. The data retention unit holds a data at the node, when at least one of the first clock signal and the second clock signal is at a second level that is an inverted level of the first level.

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