Technique and method for asynchronous scan design
Telemetering apparatus
Test for hold time margins in digital systems
Thermal limit circuit with built-in hysteresis
Three-phase master-slave flip-flop
Three-terminal inverting hysteretic transistor switch
Threshold amplifier
Timer circuit
Toggle flip-flop network with a reduced integration area
Track and hold circuit
Trans-admittance trans-impedance logic for integrated circuits
Transistor circuit with a self-holding circuit for a relay
Transmission-gate based flip-flop
Transparent flip-flop
Trigger voltage controllable Schmitt trigger circuit
Triple redundant latch design using a fail-over mechanism...
Triple redundant latch design with storage node recovery
True single-phase flip-flop
True type single-phase shift circuit
Two input-two output differential latch circuit