Latching mechanism for pulsed domino logic with inherent race ma

Details Latching mechanism for pulsed domino logic with inherent race ma Latching mechanism for pulsed domino logic with inherent race ma

1996-08-12

1998-08-18

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

327211, 327212, 326 98, H03K 19017

Patent

active

057962820

ABSTRACT:
The present invention provides a latching mechanism for use in high-speed domino logic pipestages. The latching mechanism allows time borrowing across latch boundaries, provides sufficient hold time for the output to be sensed by the next stage, and provides a circuit configuration in which race conditions related to the latching mechanism have inherent positive margin. The latching mechanism of the present invention is applicable to fully self-resetting domino logic, globally resetting domino logic, or any combination thereof. The latching mechanism is a set dominant latch having its set input driven by the output of the last domino logic gate in a pipestage, and having its reset input driven by the output of the last domino logic gate in a pipestage ANDed with a delayed version of the pulsed clock that triggers the domino chain of the pipestage.

REFERENCES:
patent: 4876465 (1989-10-01), Podkowa et al.
patent: 5208489 (1993-05-01), Houston
patent: 5402012 (1995-03-01), Thomas
patent: 5453708 (1995-09-01), Gupta et al.
patent: 5497115 (1996-03-01), Millar et al.
patent: 5517136 (1996-05-01), Harris et al.
"Self Resetting Logic Register & Incrementer", Authors: Ruud A. Haring, et al., IBM Research Report, RC 20322 (89846) Jan. 4, 1996, Engineering & Technology, Cover+ pp. 1-2.

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