Latch circuit including a data retention latch

Details Latch circuit including a data retention latch Latch circuit including a data retention latch

2006-12-26

2006-12-26

Ton, My-Trang Nu (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

Reexamination Certificate

active

07154317

ABSTRACT:
A latch circuit2is described including a function path latch4, 6, which may be in the form of a standard flip-flop, together with a data retention latch12, 14. The reset signal nreset and the scan enable signal SE are used to control these latches to perform reset, scan, save and restore functions. The save and restore functions serve to save a data value dv from the functional path latch4, 6into the data retention latch12, 14and restore this value such that the functional path latch can be powered down without a loss of data.

REFERENCES:
patent: 5939915 (1999-08-01), Curran
patent: 6380780 (2002-04-01), Aitken et al.
patent: 6437623 (2002-08-01), Hsu et al.
patent: 6680622 (2004-01-01), Zounes
V. Zyuban et al, “Low Power Integrated Scan-Retention Mechanism”ISLPED '02, Aug. 2002, pp. 98-102.

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