Latching circuit capable of rapid operation with low electric po

Details Latching circuit capable of rapid operation with low electric po Latching circuit capable of rapid operation with low electric po

1996-06-14

1998-09-22

Wong, Peter S.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

327218, 327205, H03K 3356

Patent

active

058120025

ABSTRACT:
In a latching circuit including a first inverter having first input and output sides, a second inverter having second input and output sides, the first input side is connected to an input terminal, the second input side is connected to the first output side, the second output side is connected to the input terminal, and the second inverter further has first and second transistors having a primary conduction-type and are serially connected between first power supply terminal and the input terminal and including first and second gates having first and second gate lengths, respectively, third and fourth transistors having a secondary conduction-type reverse to the primary conduction-type and are serially connected between a second power supply terminal and the input terminal and including third and fourth gates having third and fourth gate lengths, respectively. The first gate length is greater than the second gate length while the third gate length is greater than the fourth gate length.

REFERENCES:
patent: 3737673 (1973-06-01), Suzuki
patent: 4629909 (1986-12-01), Cameron
patent: 4709173 (1987-11-01), Nishimichi et al.
patent: 4877978 (1989-10-01), Platt
patent: 5013940 (1991-05-01), Ansel

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