Instruction sequence verification to protect secured data
Instruction sequence verification to protect secured data
Instruction-based timer control during debug
Integrated circuit
Integrated circuit and processing system with improved power...
Integrated circuit capable of error management
Integrated circuit card with condition detector
Integrated circuit device and its control method
Integrated circuit for coupling a microcontrolled control appara
Integrated circuit having a self-test device
Integrated circuit having a self-test device for carrying...
Integrated circuit including patching circuitry to bypass portio
Integrated circuit with integrated debugging mechanism for...
Integrated circuit with integrated debugging mechanism for...
Integrated circuit with on-chip data checking resources
Integrated circuit, in particular integrated memory, and...
Integrated dynamic-visual parallel debugging apparatus and...
Integrated EJTAG external bus interface
Integrated memory and method of repairing an integrated memory
Integrated memory having a circuit for testing the operation...