Three-statable net driver for antifuse field programmable gate a
Three-transistor NAND and NOR gates for two-phase clock...
Three-value input buffer circuit
Three-volt TIA/EIA-485 driver circuit
Threshold logic circuit with low space requirement
Threshold logic with improved signal-to-noise ratio
Threshold voltage scalable buffer with reference level
Threshold voltage scalable buffer with reference level
Threshold voltage scalable buffer with reference level
Threshold voltage scalable buffer with reference level
Tie-high and tie-low circuit
Tie-up and tie-down circuits with a primary input for testabilit
Tiered routing architecture for field programmable gate arrays
Tile-based modular routing resources for high density programmab
Tileable and compact layout for super variable grain blocks with
Tileable field-programmable gate array architecture
Tileable field-programmable gate array architecture
Tileable field-programmable gate array architecture
Tileable field-programmable gate array architecture
Tileable field-programmable gate array architecture