Electronic digital logic circuitry – Tri-state
Reexamination Certificate
2001-06-26
2002-11-12
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Tri-state
C326S017000
Reexamination Certificate
active
06480029
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to binary signal generators used in multipoint interconnection of digital equipment and more specifically to low voltage generators that meet the TIA/EIA-485 standard.
2. Description of the Related Art
The TIA/EIA-485 specification is an industry standard, which specifies the voltage, current, and resistance values of generators and receivers used in the interchange of binary signals in multipoint interconnection of digital equipment, as well as in high-speed transmission of data over SCSI (Small Computer System Interface) busses. An example of a typical application would be the interface between a SCSI hard drive and a host computer. The TIA/EIA-485 standard specifies that this circuit shall provide a minimum output voltage of 1.5 volts. In addition, as illustrated in
FIG. 1
, the specification specifies that during either the ON or OFF state the driver shall withstand voltages in the range of −7 to +12 volts applied to the driver's output with no damage to the circuit and with leakage currents limited to between −0.8 and +1.0 mA.
FIG. 2
is a block diagram of a typical TIA/EIA-485 transceiver circuit that is comprised of a generator
20
, which the circuit of this invention addresses, that is terminated in a 60-ohm resistor
21
and a remote receiver
22
. The circuit typically operates with a V
CC
voltage of +5 volts and provides a minimum differential voltage V
t2
across the terminating resistor
21
of 1.5 volts for both logic 1 or logic 0 inputs. Also, whether ON or in the tri-state (OFF) condition, the circuit must withstand voltages at the generator's output from −7V to +12V.
FIG. 3
is a block diagram for testing the generator of this invention according to the TIA/EIA-485 specification. The test is performed during ON state for voltage output differential (VOD), but also must withstand −7V to +12V applied to the output during both the ON state and tri-state. The circuit consists of a generator
30
, a terminating 60-ohm resistor
31
connected in parallel with two additional 375-ohm resistors
32
-
33
. For test purposes, the center point of these two 375 ohm resistors
32
-
33
is connected to a voltage source
34
, that can be varied between −7.0V and +12V to simulate common-mode voltages applied to the circuit's output. A series current meter
35
is added in series with the voltage source
34
for the purpose of measuring the current in circuit. The TIA/EIA-485 specification specifies that the magnitude of the differential output voltage V
t2
, measured between the two output terminals during ON state, shall not be less than 1.5 volts nor greater than 5.0 volts and that the circuit's output will withstand voltages in the range of −7.0V to +12.0V while in both the ON state and tri-state. The test is performed for both logic 0 and logic 1 input states.
FIG. 4
is a schematic for a typical TIA/EIA-485 generator circuit
20
. The circuit consist of an A-terminal 485-driver PMOS/NMOS transistor pair
40
and a B-terminal 485-driver PMOS/NMOS transistor pair
41
that source and sink current to a 60-ohm load resistor
42
. The input signal to the B-terminal driver
41
is inverted relative to the A-terminal driver
40
by means of an inverter
43
such that the two drivers
40
-
41
operate out-of-phase; i.e., the circuit sources and/or sinks currents according to the following state table for the circuit inputs:
A-terminal
B-terminal
E
n
I
n
Driver 40
Driver 41
1
0
Sources I
Sinks I
1
1
Sinks I
Sources I
In operation, when the circuit is enabled (E
n
=1) and the input level is a logic 0 (I
n
=0) the A-terminal driver
40
sources current while the B-terminal driver
41
sinks current. Similarly, when the input level is a logic 1 (I
n
=1) the A-terminal driver
40
sinks current while the B-terminal driver
41
sources current. Also shown are the two 375-ohm resistors
44
-
45
, a −7V to +12V voltage source
46
, and a current meter
47
used in testing the circuit.
FIG. 5
is a block diagram showing one of the two 485-driver circuits (
40
-
41
) discussed above. Each driver circuit
40
-
41
consists of a current sourcing transistor
50
and a current sinking transistor
51
. The current sourcing transistor
50
is typically a PMOS (p-channel) transistor while the current sinking transistor
51
is a NMOS (n-channel) transistor, although PNP and NPN bipolar transistors can also be used. The circuit further comprises input logic circuitry, as well as a sourcing pre-driver (inverter)
56
and a sinking pre-driver (inverter)
58
. The sourcing logic has an NOR gate
55
with inputs being the I
n
and E
n
* signals. The sinking logic is comprised of a NAND gate
57
with inputs E
n
and I
n
. The E
n
signal is generated by inverting the E
n
* signal by means of an inverter
54
. During either the ON state or the disabled (OFF) state, excessive voltages can be applied to the output, turning ON the output stage transistors or their back gate diodes allowing current to flow into or out of V
CC
/Gnd. To prevent this from happening, Schottky diodes
52
and
53
are typically added in series with transistors
50
and
51
, respectively, as reverse current blocking devices; i.e., the upper diode
52
is used to prevent leakage current from flowing into V
CC
if the p-channel transistor's
50
back-gate diode is turned ON when excessive voltage is applied to the circuit output during the off state. Similarly, the lower diode
53
is used to prevent leakage current from flowing from GND if the n-channel transistor's
51
back-gate is turned ON when excessive voltage is applied to the circuits output during the disabled-state. However, because these diodes are in the signal path, they must be large in order to handle the sourcing and/or sinking current, and as a result a significant voltage drop occurs across them, limiting the differential output voltage swing of the driver. This output voltage drop may be tolerable in high voltage (+5V V
CC
) supply applications, but there is a problem maintaining the required 1.5V differential output for the low voltage (+3V V
CC
) system applications addressed by this invention.
The state chart for the typical 485-driver circuit of
FIG. 5
is as follows:
PMOS
NMOS
E
n
I
n
Transistor 50
Transistor 51
1
0
Sources I
OFF
Enabled
1
1
OFF
Sinks I
Enabled
0
0
OFF
OFF
Inhibited
0
1
OFF
OFF
Inhibited
As shown, when the driver circuit is enabled (turned ON), either the p-channel transistor sources current from V
CC
or the n-channel transistor sinks current to GND, depending on the binary state of the input signal I
n
. When the driver circuit is inhibited (turned OFF), both the p-channel and n-channel transistors are OFF.
FIG. 6
is a schematic for a typical 485-driver circuit
40
-
41
. Comparing this to the block diagram discussed above, the circuit is comprised of an E
n
signal inverter
66
, current sourcing logic circuitry
64
and current sinking logic circuitry
65
, current sourcing pre-driver circuits
62
, current sinking pre-driver circuit
63
, current output sourcing driver
60
, and the current output sinking driver
61
. The current sourcing driver
60
consists of a Schottky diode
600
in series with a p-channel transistor
601
, while the current sinking driver
61
consists of a Schottky diode
610
in series with a n-channel transistor
611
. The sourcing and sinking pre-driver circuits
62
-
63
are basically inverters consisting of p-channel
-channel transistor pairs
620
,
630
/
621
-
631
, respectively. The sourcing logic circuitry
64
is a NOR gate consisting of two p-channel transistors
640
-
641
and two n-channel transistors
642
-
643
. Similarly, the sinking logic circuitry
65
is a NAND gate consisting of two p-channel transistors
650
-
651
and two n-channel transistors
652
-
653
. Finally, the E
n
signal inverter
66
consists of p-channel transistor
660
and n-channel transistor
6
Carvajal Fernando D.
Jones, III Roy C.
Morgan Mark W.
Brady III W. James
Cho James H.
Moore J. Dennis
Tokar Michael
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