Hierarchial clock distribution system and method
Hierarchical clock distribution system and method
Hierarchical interconnect for programmable logic devices
Hierarchical interface for IC system
Hierarchical programming of electrically configurable integrated
Hierarchical programming of electrically configurable integrated
Hierarchically connectable configurable cellular array
Hierarchically connectable configurable cellular array
Hierarchically-structured programmable logic array and system fo
High and low voltage compatible CMOS buffer
High bandwidth reconfigurable on-chip network for...
High capacitive load and noise tolerant system and method...
High current 5V tolerant buffer using a 2.5 volt power supply
High density and high speed magneto-electronic logic family
High density and high speed magneto-electronic logic family
High density antifuse based partitioned FPGA architecture
High density antifuse based partitioned FPGA architecture
High density PLD structure with flexible logic built-in blocks
High density programmable logic device
High fan-out signal routing systems and methods