5 volt tolerant I/O buffer circuit
Activ shunt-peaked logic gates
Adaptive threshold logic circuit
Adiabatic CMOS design
Adjustable, full CMOS input buffer for TTL, CMOS, or low swing i
Adjustable, full CMOS input buffer for TTL, CMOS, or low...
Adjusting settings of an I/O circuit for process, voltage,...
Apparatus and method for allowing a dynamic logic gate to operat
Apparatus and method for allowing a synamic logic gate to operat
Apparatus and method for impedance control
Apparatus and method to correct a reference voltage
Asymmetric current mode driver for differential transmission lin
Asynchronous interconnection system for 3D interchip...
Bias circuit for an input terminal
Bias compensator for differential transmission line with voltage
Bidirectional transmission line driver/receiver
BiMIS circuit
Block-by-block leakage control and interface
Buffer circuit with rising and falling edge propagation...
Buffer with pseudo-ground hysteresis