Bias compensator for differential transmission line with voltage

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization

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326 30, 326 86, H03K 1716

Patent

active

061247278

ABSTRACT:
A bias compensator circuit for significantly reducing an offset produced by a termination bias that is associated with a differential pair bus. The differential pair bus is connected to a driver. The bias compensator circuit includes: (a) a signal source connected to a first line of the differential pair; (b) a first switch for switching ON the signal source while the driver is driving; (c) a signal sink connected to a second line of the differential pair; and (d) a second switch for switching ON the signal sink while the driver is driving.

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National Semiconductor, "LVDS Owner's Manual & Design Guide" (1st Ed.), Spring 1997.

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