Adjustable, full CMOS input buffer for TTL, CMOS, or low swing i

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization

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326 31, 326 68, 326 81, 326 83, H03K 190185

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active

060231742

ABSTRACT:
An input buffer within an integrated circuit capable of receiving an input signal that complies with the electrical characteristic voltage levels of TTL, LVTTL, SSTL, or GTL, buffering the input signal, and converting the input signal to an output signal having voltage levels acceptable to internal circuitry of the integrated circuits is described. The input buffer will have an adjustable threshold trip point at which the input signal will cause the output signal to change between a first logic state and a second logic state. The adjustable threshold trip point will be determined by an adjustment voltage circuit that is immune to variation in semiconductor processing parameters, power supply voltage and operating temperature.

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