Clock tree network in a field programmable gate array
Clock tree network in a field programmable gate array
Clock tree network in a field programmable gate array
Clock tree network in a field programmable gate array
Clustered field programmable gate array architecture
CMOS digital level shift circuit
Coarse-grained look-up table architecture
Columnar architecture
Columnar floorplan
Combination of global clock and localized clocks
Combination of global clock and localized clocks
Combined multiplex or/flop
Combined processing and non-volatile memory unit array
Combined tristate/carry logic mechanism
Communication device for a logic circuit
Communication device for a logic circuit
Communication device with configurable module interface
Compact logic cell for field programmable gate array chip
Comparator and method of implementing a comparator in a...
Compare, select, sort, and median-filter apparatus in...