Test methodology for direct interconnect with multiple fan-outs

Details Test methodology for direct interconnect with multiple fan-outs Test methodology for direct interconnect with multiple fan-outs

2005-09-13

2005-09-13

Tokar, Michael (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Array

C326S038000, C326S039000

Reexamination Certificate

active

06943581

ABSTRACT:
A test cell and method of operation are disclosed. The test cell may be cascaded with other test cells to form a test structure that spans across any number of slices and/or tiles in a programmable logic device. The test structure behaves like a register, and may be used to test direct interconnects and any number their fan-out lines simultaneously.

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