Implementing a priority function using ripple chain logic
Implementing complex clock designs in field programmable...
Implementing conditional statements in self-timed logic...
Implementing wide multiplexers in an FPGA using a horizontal...
In-line SCSI bus circuit for providing isolation and bi-directio
In-service programmable logic arrays with ultra thin...
In-system programmable interconnect circuit
In-system programming of a non-compliant device using...
In-system programming of a non-compliant device using...
In-system programming of non-JTAG device using SPI and JTAG...
Incrementer based on carry chain compression
Indicating completion of configuration for programmable devices
Individually accessible macrocell
Initializing a carry chain in a programmable logic device
Innovated technique to reduce memory interface write mode...
Input buffer with CMOS driver gate current control enabling...
Input buffer with selectable threshold and hysteresis option
Input buffer with selectable threshold and hysteresis option
Input circuit for mode setting
Input pad having an enable terminal employed in a low-current-co