Input buffer with CMOS driver gate current control enabling...

Electronic digital logic circuitry – Multifunctional or programmable

Reexamination Certificate

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Details

C326S037000, C326S086000, C326S090000

Reexamination Certificate

active

06870391

ABSTRACT:
An input/output buffer is provided which can be used to make an integrated circuit selectively compatible with one of a number of interface types, such as PCI, GTL, PECL, ECL and SSTI. The input buffer portion includes a first pair of CMOS transistors for driving the output (OUT) between the VSS and VDD rails similar to CMOS logic. Switching circuitry includes transistors which drive gates of the CMOS transistors to set the output (OUT) with a current level and a voltage level depending on a desired output drive current and voltage.

REFERENCES:
patent: 6005414 (1999-12-01), Reay
patent: 6028758 (2000-02-01), Sharpe-Geisler
patent: 6031365 (2000-02-01), Sharpe-Geisler
patent: 6218858 (2001-04-01), Menon et al.
U.S. patent application Ser. No. 10/146,739, Sharpe-Geisler, filed May 16, 2002.
U.S. patent application Ser. No. 10/146,826, Sharpe-Geisler, filed May 16, 2002.
U.S. patent application Ser. No. 10/147,199, Sharpe-Geisler, filed May 16, 2002.
U.S. patent application Ser. No. 10/146,734, Sharpe-Geisler, filed May 16, 2002.
U.S. patent application Ser. No. 10/147,011, Sharpe-Geisler, filed May 16, 2002.
U.S. patent application Ser. No. 10/151,753, Sharpe-Geisler, filed May 16, 2002.

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