Individually accessible macrocell

Details Individually accessible macrocell Individually accessible macrocell

1998-06-10

2000-05-23

Tokar, Michael

Electronic digital logic circuitry

Multifunctional or programmable

Array

326 41, H03K 1977

Patent

active

060669616

ABSTRACT:
A circuit connectable to a microcontroller having an address bus, a data bus, a read line and a write line include a programmable logic device (PLD) array, at least one input pin, at least two databus macrocells and a bit mask register. The input pin is connected to the PLD array and is connectable to the address bus. The databus macrocell is connected to the PLD array and to an external unit and is also connectable to the data bus, the read line and the write line. The bit mask register has at least two bits, each associated with one of the at least two macrocells. The databus can directly access the databus macrocell only if its associated bit in the bit mask register is of the correct state. In another embodiment, the write line carries an edge write signal and the databus accesses the databus macrocell on one edge of the edge write signal.

REFERENCES:
patent: 5091661 (1992-02-01), Chiang
patent: 5153462 (1992-10-01), Agrawal et al.
patent: 5220214 (1993-06-01), Pedersen
patent: 5231312 (1993-07-01), Gongwer et al.
patent: 5386155 (1995-01-01), Steele et al.
patent: 5523706 (1996-06-01), Kiani et al.

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