Input circuit for mode setting

Details Input circuit for mode setting Input circuit for mode setting

1996-10-24

1998-06-09

Westin, Edward P.

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

326 57, H03K 17173, H03K 1900

Patent

active

057640750

ABSTRACT:
In order to provide an input circuit for mode setting with a simple configuration sufficiently stable and without unnecessary current consumption, the input circuit of the invention, for outputting a control signal (MODE OUT) according to a status of a mode setting terminal (I1), comprises latch means (100) being reset with a rising edge of a reset signal (RES) to output the control signal (MODE OUT) of logic LOW and latching logic of the mode setting terminal (I1) with a falling edge of a delayed signal (RESD) of said reset signal (RES) for maintaining to output inverse or the same logic of said logic of the mode setting terminal (I1) latched, and pull-up or pull-down means (P1) becoming ON for pulling up or down the mode setting terminal (I1) to logic HIGH or LOW when the mode setting terminal (I1) is left open gated by logic LOW of the control signal (MODE OUT) and becoming OFF for cutting a current flowing through the mode setting terminal (I1) gated by logic HIGH of the control signal (MODE OUT).

REFERENCES:
patent: 4985641 (1991-01-01), Nagayama et al.
patent: 5321316 (1994-06-01), Nakajima
patent: 5532957 (1996-07-01), Malhi
patent: 5598110 (1997-01-01), Chang
patent: 5684411 (1997-11-01), Nepple

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