Flexible synchronous/asynchronous cell structure for a high dens

Flexible synchronous/asynchronous cell structure for a high dens

Flexible, high-performance static RAM architecture for field-pro

Floor plan for scalable multiple level tab oriented...

Floor plan for scalable multiple level tab oriented...

Floor plan for scalable multiple level tab oriented...

Formation of columnar application specific circuitry using a...

FPGA and embedded circuitry initialization and processing

FPGA architecture at conventional and submicron scales

FPGA architecture based on a single configurable logic module

FPGA architecture having RAM blocks with programmable word lengt

FPGA architecture having two-level cluster input...

FPGA architecture having two-level cluster input...

FPGA Architecture using multiplexers that incorporate a logic ga

FPGA architecture with deep look-up table RAMs

FPGA architecture with dual-port deep look-up table RAMS

FPGA architecture with mixed interconnect resources...

FPGA architecture with mixed interconnect resources...

FPGA architecture with offset interconnect lines

FPGA architecture with repeatable tiles including routing matric