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Process compensated output driver with slew rate control

Electronic digital logic circuitry – Interface – Current driving
Patent

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Programmable bit ordering for serial port

Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate

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Programmable buffer circuit

Electronic digital logic circuitry – Interface – Current driving
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Programmable buffer circuit comprising reduced number of transis

Electronic digital logic circuitry – Interface – Current driving
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Programmable burst FIFO

Electronic digital logic circuitry – Interface – Current driving
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Programmable current output buffer

Electronic digital logic circuitry – Interface – Current driving
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Programmable differential signaling system

Electronic digital logic circuitry – Interface – Current driving
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Programmable drive circuit for I/O port

Electronic digital logic circuitry – Interface – Current driving
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Programmable drive strength output buffer with slew rate control

Electronic digital logic circuitry – Interface – Current driving
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Programmable driver circuit for multi-source buses

Electronic digital logic circuitry – Interface – Current driving
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Programmable high speed quiet I/O cell

Electronic digital logic circuitry – Interface – Current driving
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Programmable impedance controller and method for operating

Electronic digital logic circuitry – Interface – Current driving
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Programmable IO architecture

Electronic digital logic circuitry – Interface – Current driving
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Programmable LED driver

Electronic digital logic circuitry – Interface – Current driving
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Programmable pin impedance reduction on multistandard...

Electronic digital logic circuitry – Interface – Current driving
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Programmable slew rate CMOS buffer and transmission line driver

Electronic digital logic circuitry – Interface – Current driving
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Programmable termination for CML I/O

Electronic digital logic circuitry – Interface – Current driving
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Programmable, staged, bus hold and weak pull-up for...

Electronic digital logic circuitry – Interface – Current driving
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Protocol-based bus termination for multi-core processors

Electronic digital logic circuitry – Interface – Current driving
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Pseudo differential bus driver/receiver for field programmable d

Electronic digital logic circuitry – Interface – Current driving
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