Programmable buffer circuit

Electronic digital logic circuitry – Interface – Current driving

Reexamination Certificate

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Details

C326S026000, C326S068000

Reexamination Certificate

active

08063665

ABSTRACT:
A buffer circuit includes an input configured to receive an input signal; and a buffer configured to generate an output signal based on the input signal. In an embodiment, the output signal has a linear relationship with the input signal when the input signal is within the input voltage range; and the buffer circuit further includes a level-shifting circuit coupled with the input, wherein the level shifting circuit determines an input voltage range, and wherein one of an upper limit and a lower limit of the input voltage range is within 50 millivolts from a supply rail voltage. In another embodiment, the buffer circuit further includes a programmable chopping module coupled with the buffer, wherein the programmable chopping module is programmable with a selected configuration from a plurality of configurations, and wherein the programmable chopping modulates the input signal based on the selected configuration. In yet another embodiment, the buffer circuit further includes a programmable output filter coupled with the buffer, wherein the programmable output filter is programmable with a selected configuration from a plurality of configurations, and wherein the programmable output filter filters a frequency band of the output signal based on the selected configuration.

REFERENCES:
patent: 7489745 (2009-02-01), Fudge
patent: 7555263 (2009-06-01), Rofougaran et al.
patent: 7583179 (2009-09-01), Wu et al.

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