Programmable buffer circuit comprising reduced number of transis

Details Programmable buffer circuit comprising reduced number of transis Programmable buffer circuit comprising reduced number of transis

1997-12-08

1999-12-07

Tokar, Michael

Electronic digital logic circuitry

Interface

Current driving

326120, 326121, 326 50, H03K 190185

Patent

active

05999018&

ABSTRACT:
A programmable buffer circuit includes a first stage circuit which receives an input signal IN indicative of a first or second value, and a second stage circuit, responsive to an output of the first stage circuit, for outputting one of a value designated depending on the value of the input signal and a value designated regardless of the value of the input signal. The second stage circuit includes a plurality of MOS transistors whose conduction properties change depending on whether ion implantation is applied thereto. By applying the ion implantation selectively to the MOS transistors, the second stage circuit is operated as a transfer logical function circuit or an inverter logical function circuit.

REFERENCES:
patent: 3986043 (1976-10-01), Buckley, III et al.
patent: 4481432 (1984-11-01), Davies, Jr.
patent: 4482822 (1984-11-01), Kamuro et al.
patent: 4612459 (1986-09-01), Pollachek
patent: 4634893 (1987-01-01), Craycraft et al.

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