Pseudo differential bus driver/receiver for field programmable d

Details Pseudo differential bus driver/receiver for field programmable d Pseudo differential bus driver/receiver for field programmable d

1996-08-08

1998-10-06

Santamauro, Jon

Electronic digital logic circuitry

Interface

Current driving

326 39, 326 45, 326 81, H03K 190185, H03K 19177

Patent

active

058182616

ABSTRACT:
A bus mechanism mitigates programmable device performance and power consumption issues by utilizing a small swing transmitter at the source end of an interconnect network and a high gain differential amplifier at the receiver end of the interconnect network. The signal is generated as a small swing voltage differential compared to a reference voltage and the reference voltage is set at a magnitude close to the negative power supply signal (near ground or GND). Because the performance of NMOS cross point switches with signals close to GND is very good, virtually no signal swing is lost in these NMOS cross point switches. The small swing signal voltages also significantly reduce the power dissipated when transmitting data. Transmitter pre-charge, differential amplifier equalization and a PMOS differential amplifier further enhance performance and reduce power consumption. The bus mechanism is well suited to the general requirements of field programmable devices of providing flexible fan-in, flexible fan-out, and unrestricted interconnect through NMOS cross point switches and large interconnect load capacitances.

REFERENCES:
patent: 5311083 (1994-05-01), Wanlass
patent: 5541529 (1996-07-01), Mashiko et al.
patent: 5614844 (1997-03-01), Sasaki et al.
patent: 5644255 (1997-07-01), Taylor

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