Slew based clock multiplier
Small aperture latch for use with a differential clock
Soft error protected dynamic circuit
SOI CMOS dynamic circuits having threshold voltage control
Source synchronous I/O using temporal delay queues
Source synchronous interface using variable digital data...
Static combinatorial logic circuits for reversible computation
Static logic compatible multiport latch
Static-dynamic logic circuit
Structure and method for generating a clock enable signal in...
Structure and method of alternating precharge in dynamic SOI...
Surfing logic pipelines
Switch controlling circuit, switch circuit utilizing the...
Symmetric differential domino “AND gate”
Synchronization circuit
Synchronization of clock signals in a multi-clock domain
Synchronization of programmable multiplexers and demultiplexers
Synchronization of programmable multiplexers and demultiplexers
Synchronizer circuit and method for reducing the occurrence of m
Synchronizing interface device for computer facilities